1. Field of the Invention
The present invention relates to microcontrollers, and in particular, to a technique of suppressing current consumption in time of stand-by in a power shutdown mode in which a program can proceed. This technique is also applicable to a communication device and a recording device.
2. Description of the Related Art
A general microcontroller has a stop mode for stopping supply of a operation clock and reducing current consumption as a standby mode, which is one of the operation modes. In the stop mode, start-up etc. of the software does not need to be performed since the internal state is maintained, and high speed restoration from the standby state is possible. However, as circuits are being configured with microscopic transistors due to advancement in recent semiconductor manufacturing techniques, the OFF current (leakage current) of the transistor is in great amount, and the current consumption even in the stop mode tends to be large.
The current consumption caused by leakage current is made to substantially zero in a method of shutting down power to suppress the current consumption. In this case, since the internal state of the microcontroller is destroyed due to power shutdown, the initialization program must be executed from the reset process in order to initialize the inside. However, if such process is executed, the initial setting of the microcontroller and the start-up of the operating system are performed, whereby the time required for restoration becomes longer.
A power shutdown mode for allowing a program to proceed was thus developed. Related arts include a technique in which a standby control circuit is arranged proposed in a Japanese Laid-Open Patent Publication (Japanese Laid-Open Patent Publication No. 2005-11166). This technique performs a control to continue power supply to an information holding circuit for holding the value of a register contained in a peripheral circuit module when shutting down power supply to a CPU (Central Processing Unit) and the peripheral circuit module. In such control, when an interrupt request is notified from outside the device, the power supply to the CPU and the peripheral circuit module is resumed, and the evacuated information is restored to the CPU and the peripheral circuit module. Returning again to the execution of the program, an interrupt processing corresponding to the interrupt request is performed. According to such a configuration, the reduction in standby current by power shutdown and high-speed restoration from standby by interrupt both can be obtained.
In the technique of the standby control circuit, after prohibiting interruption, the value of the register to be necessary in the software is evacuated, and the power is shutdown while prohibiting interruption. This process is performed because there is a possibility that the evacuated register value may change before the power shutdown if interrupt is accepted before the power shutdown.
However, in the technique of the standby control circuit, if the power supply is shutdown with the interruption for restoration occurring while prohibiting interruption,                restoration may not be possible unless interrupt reoccurs,        the interrupt processing is performed after executing the power shutdown process and the power supply process, and the delay time from the occurrence of interrupt until the execution of the actual process becomes long, and        the temporal anteroposterior relationship of the power supply process and the interrupt processing may reverse.        
Furthermore, in the technique of the standby control circuit, the backup register and the register to be evacuated are directly connected by way of a logic circuit as the information holding means.
However,                the backup registers of the number equivalent to the number of registers to be evacuated are necessary; and        wirings double the number of registers to be evacuated are necessary.        
Since the wiring is the portion connecting the portion of shutting down power and the portion of continuously supplying the power, a logic circuit for preventing unnecessary current from flowing and a logic circuit for preventing destruction of information are required, whereby the circuit scale is increased.